1. Field of the Invention
The invention relates to a CSP type semiconductor device with high reliability and a manufacturing method thereof.
2. Description of the Related Art
CSP (Chip Size Package) has received attention as a new packaging technology in recent years. The CSP means a small package having almost the same outside dimensions as those of a semiconductor die packaged in it.
Conventionally, a BGA (Ball Grid Array) type semiconductor device has been known as a kind of CSP. Ball-shaped conductive terminals are provided in this BGA type semiconductor device, being electrically connected with pad electrodes on a semiconductor substrate.
When this BGA type semiconductor device is mounted on electronic equipment, a semiconductor die is electrically connected with an external circuit on a printed circuit board by compression bonding of the conductive terminals to wiring patterns on the printed circuit board.
Such a BGA type electronic device has advantages in providing a large number of conductive terminals and in reducing size over other CSP type semiconductor devices such as SOP (Small Outline Package) and QFP (Quad Flat Package), which have lead pins protruding from their sides. Therefore, the BGA type electronic device is broadly used as an image sensor chip for a digital camera incorporated into a mobile telephone or the like, for example.
Hereafter, the conventional BGA type semiconductor device will be described using figures (FIGS. 7 to 10). FIGS. 7 to 10 show cross-sectional views in process order.
First, a silicon oxide film 101 and an interlayer insulation film 102 (a polyimide type resin film, a PSG film, or the like) are formed on a semiconductor substrate 100 made of silicon (Si) or the like as shown in FIG. 7.
A metal layer (aluminum layer) is then formed on the interlayer insulation film 102 and patterned using a mask (not shown) to form a pad electrode 103 on the interlayer insulation film 102.
Next, a passivation film 104 made of solder resist or the like is formed on the front side of the semiconductor substrate 100 including on the pad electrode 103, and exposure and development are performed to the passivation film 104, thereby forming an opening 105 exposing a predetermined surface of the pad electrode 103 as shown in FIG. 8.
Then, a plating layer 106 having a layered structure of nickel (Ni) and gold (Au) is formed on the pad electrode 103 exposed in the opening 105 by an electrolytic plating method or an electroless plating method as shown in FIG. 9.
A portion near an end portion of the pad electrode 103 is not covered with the plating layer 106, leaving an exposed portion 107. There can be various causes of the formation of this exposed portion 107. One example is that residues of the passivation film 104 are easy to remain on its sidewall (patterned surface) when the opening 105 is formed due to filler (additive) or the like added to the passivation film 104 for preventing the passivation film 104 from warping, and the residue makes the sidewall uneven, so that the plating layer 106 does not adhere to the sidewall enough. It is noted that the exposed portion 107 means a portion exposing the pad electrode 103 between the passivation film 104 and the plating layer 106.
Next, a solder ball is fixed to a predetermined region of the plating layer 106 by an electrolytic plating method or an electroless plating method, thereby forming a conductive terminal 108 as shown in FIG. 10.
It is possible to form the conductive terminal 108 by screen-printing solder and reflowing the solder by a heat treatment (solder bump).
The relevant technology is disclosed in Japanese Patent Application Publication No. 2000-299406.
In the described conventional BGA type semiconductor device, however, a substance such as moisture, chemicals, a corrosive gas, metal ions, or the like that causes corrosion infiltrates through the exposed portion 107 to corrode the pad electrode 103 and reduces the reliability of the semiconductor device.